EEC V file conversion

[BOOSTEDEVERYTHING]

You now have the location of the starting point for each base address, + or - offset.

Forgive me of this is a stupid question, But what do I do with these now, or what is the significance of them? I guess is what I am asking. I get that a Rbase address contains a set value for something in the code to add and subtract from...etc... But would I just use the SYM command to name them base address 1,2,3,etc, for sake of naming them or Is there a use for the Rbase base address location itself? Again, sorry if this sounds stupid.
I do have the RBase stuff from MSG file in my DIR file and have also added a few others that I have found along the way that SAD did not, Or JSA found mostly, LOL, But I don't understand the significance, if any to the other info. LOL now I am confusing myself, I think!!

[wwhite]

Code: Select all

8 21a9: a1,c8,89,26          ldw   R26,89c8           R26 = 89c8;      
8 21ad: b2,27,29             ldb   R29,[R26++]        R29 = [R26++];       <-----Byte 1

8 21b8: b2,27,28             ldb   R28,[R26++]        R28 = [R26++];       <-----Byte 3

If you've found a way to use the struct command to combine byte 1 & 3 and give a usable result please post the command and options from your DIR?

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8 21b5: b2,27,2a             ldb   R2a,[R26++]        R2a = [R26++];       
8 21b8: b2,27,28             ldb   R28,[R26++]        R28 = [R26++];       
8 21bb: b2,27,2b             ldb   R2b,[R26++]        R2b = [R26++];   

stb   [R28],R2b          [R28] = R2b;

R2a = Is a count down value, starts high goes to zero, hence the R2a--;
R28 = Is the register to store the value
R2b = Is the value to store in the register of R28

byte 1 and byte 3 are completely unrelated, they shouldn't be combined.

[wwhite]

You now have the location of the starting point for each base address, + or - offset.

Forgive me of this is a stupid question, But what do I do with these now, or what is the significance of them? I guess is what I am asking. I get that a Rbase address contains a set value for something in the code to add and subtract from...etc... But would I just use the SYM command to name them base address 1,2,3,etc, for sake of naming them or Is there a use for the Rbase base address location itself? Again, sorry if this sounds stupid.
I do have the RBase stuff from MSG file in my DIR file and have also added a few others that I have found along the way that SAD did not, Or JSA found mostly, LOL, But I don't understand the significance, if any to the other info. LOL now I am confusing myself, I think!!

Some Ford Programmers decided to set a different value for an already set Rbase. Some bins you have to set the Rbase correctly in different parts of the code so SAD can disassemble correctly.

[tvrfan]

Some Ford Programmers decided to set a different value for an already set Rbase. Some bins you have to set the Rbase correctly in different parts of the code so SAD can disassemble correctly.

Just to be clear on this, SAD itself only allows an RBASE register to be detected automatically if one, and only one, address value is written to a register. It may be written more than once in different places (A9L does this) BUT the actual value (as an address) MUST NOT CHANGE.

This is why registers set to be a base only for a subroutine will not be detected. (still working out how to do this automatically)

You can define any valid register to be an RBASE with a user command, and optionally make it valid for a defined address range, for that case where it is used in a subroutine.

Simple example in A9L is at subroutine 0x235d where R22 is used as an rbase only within that subroutine, so it is NOT detected automatically as R22 is used elsewhere.

[tvrfan]

Rbases - more general info -

My theory about why Ford did this instead of using direct addresses. (AA and early bins use direct addresses for data)

So that they can load different engine calibrations (or fixes) 'on the fly' with a plugin console. If all the data is accessed via indexed [register+offset] commands, then simply changing those registers to point somewhere else will replace everything with a new data set (loaded in the console ?).

Typically there are 8 rbase registers for ROM data, plus a few more loaded elsewhere in code for RAM data. Some later multibanks use 16 or more registers.

[jsa]

Code: Select all

8 21be: c6,28,2b             stb   [R28],R2b          [R28] = R2b;         

byte 1 and byte 3 are completely unrelated, they shouldn't be combined.

C6 is Indirect address mode.

3-2.3.5 INDIRECT ADDRESS MODE
The indirect address mode enables software to access any"A"operand byte or word location between
addresses'^0000 to '^FFFF using a 16-bit effective address(EA). The 16-bit effective address is
stored as a word variable on-board the microprocessor 10 chip. Software specifies the location of
the word variable as an 8-bit address in the R^ component of the address mode format. The word
variable must be address-aligned at its memory location. Indirect addressing is specified at the
assembly source level by any operand label or address prefixed with the symbol, e.g., ADCB
@TEMP,SCALE or ADCB @'^2A,'^B6 where TEMP and ^2A are "A"operand designators.

R28 holds a word length address, so bytes 1 & 3 are combined as the word length address destination, with a store size of one byte, for the byte length data held in source R2B.
Byte1/R29 is the address word high byte.
Byte3/R28 is the address word low byte.

[tvrfan]

Boosted - have a look at the address modes in the software manual.
Opcodes between 0x40 and 0xcf inclusive are MULTIPLE ADDRESS MODE opcodes and have SIX (yes SIX!) different address modes.
Yes, it's horrible. Note that they are DIFFERENT LENGTHS, which makes disassembling them even more of a PITA ...

e.g. for LDW which is 0xa0 - 0xa3.

a0 = load direct register to register,
a1 = load immediate value,
a2 = load indirect (with a sub-option),
a3 = load indexed (with a sub-option)

modes are

Code: Select all

  a0, 8a, 88           ldw  R88,R8a        R88 = R8a;      # load value in R8a to R88
  a1, 80,01,88         ldw  R88,180        R88 = 180;      # load fixed value of 180 into R88  (called 'immediate value')
  a2, 8a, 88           ldw  R88,[R8a]      R88 = [R8a];    # load value POINTED TO by value in R8a (i.e. R8a is a pointer)
  a2, 8b, 88           ldw  R88,[R8a++]    R88 = [R8a++];  # load value pointed to by value in  R8a and increment R8a afterwards (i.e. +2 bytes for load word)           
  a3, 8a, 02, 88       ldw  R88,[R8a+2]    R88 = [R8a+2]   # load value pointed to by value (R8a PLUS 2)   where 2 is a BYTE offset     
  a3, 8b, ee,07,88     ldw  R88,[R8a+7ee]  R88 = [R8a+7ee]; # load value pointed to by value (R8a PLUS 7ee) where 7ee is a WORD offset           

(later 8065 CPUs had a SEVENTH mode too, (a sub-option on a0) but I will ignore that here....)

[BOOSTEDEVERYTHING]

I do get confused by address modes a ton. I may have to make a small cheat sheet of some kind for quick reference. Also table and function size cheat sheet. Both very simplistic and minimalistic.

On a side note, would it be really hard to fix the arguments not loading bug in SAD V4.012? I find myself swapping back and forth a lot between that and 4.0716b to swap between the vector bank bug in one version and the arg bug in the other. lol. If not, no big deal. I know you’ve been focused on V5 and have other things to do as well. Just figured I would ask. Thanks.

[tvrfan]

I do get confused by address modes a ton. I may have to make a small cheat sheet of some kind for quick reference. Also table and function size cheat sheet. Both very simplistic and minimalistic.

On a side note, would it be really hard to fix the arguments not loading bug in SAD V4.012? I find myself swapping back and forth a lot between that and 4.0716b to swap between the vector bank bug in one version and the arg bug in the other. lol. If not, no big deal. I know you’ve been focused on V5 and have other things to do as well. Just figured I would ask. Thanks.

Er..I thought I had fixed all notified bugs in latest stable v4 ..... Did I miss this one ??

Can you or jsa or somebody tell me what this is exactly (i.e. more detail) and I'll have a look.

[BOOSTEDEVERYTHING]

It just will not print the labels on arg lines. I used the same DIR, CMT, and BIN files for both versions and here is the same section of code from each.

V4.012

Code: Select all

Sbg07F12_RZAxxxxx_21.1.18.10_AIR_SELF_TEST_EO:
07f12: a0,79,26           ldw   R26,R178         TEMP1L = IMAF;
07f15: 8b,fe,0a,26        cmpw  R26,[Rfe+a]      
07f19: d1,13              jleu  07f2e            if (TEMP1L <= MAF_HI_KOEO) goto 07f2e; }

     # JGTU  from L07F07                                                           Sbg07EF0_RZA9BC2F_21.1.18.5_AIR_SELF_TEST_ER_ENTRY
     # SJump from L07F0F                                                           Sbg07EF0_RZA9BC2F_21.1.18.5_AIR_SELF_TEST_ER_ENTRY
07f1b: b3,d8,2d,c6        ldb   Rc6,[Rd8+2d]     FLAGTEMP_BG = AIR_BACK_FLAGS;
07f1f: 3b,c6,0c           jb    B3,Rc6,07f2e     if (B3_FLAGTEMP_BG = 0)  {
07f22: b3,d8,2d,c6        ldb   Rc6,[Rd8+2d]     FLAGTEMP_BG = AIR_BACK_FLAGS;
07f26: 3a,c6,05           jb    B2,Rc6,07f2e     if (B2_FLAGTEMP_BG = 0)  {
07f29: ef,2e,59           call  0d85a            Sxx0D85A_ALSO_RZA0F887_39.1.1.2.8_STORE_CODE(&Pxxx) (
07f2c: 9e,0a                    #arg 1              a9e ); } } } } } }

     # JLEU  from L07EF5                                                           Sbg07EF0_RZA9BC2F_21.1.18.5_AIR_SELF_TEST_ER_ENTRY
     # JLEU  from L07EFE                                                           Sbg07EF0_RZA9BC2F_21.1.18.5_AIR_SELF_TEST_ER_ENTRY
     # JC    from L07F0D                                                           Sbg07EF0_RZA9BC2F_21.1.18.5_AIR_SELF_TEST_ER_ENTRY
     # JLEU  from L07F19                                                           Sbg07F11_RZA9BC52_12.1.18.6_AIR_SELF_TEST_EO_ENTRY
     # JB    from L07F1F B3_FLAGTEMP_BG = 1                                        Sbg07F11_RZA9BC52_12.1.18.6_AIR_SELF_TEST_EO_ENTRY
     # JB    from L07F26 B2_FLAGTEMP_BG = 1                                        Sbg07F11_RZA9BC52_12.1.18.6_AIR_SELF_TEST_EO_ENTRY
07f2e: 20,63              sjmp  07f93            goto 07f93;

V4.07.16b

Code: Select all

 Sbg07F12_RZAxxxxx_21.1.18.10_AIR_SELF_TEST_EO:
07f12: a0,79,26           ldw   R26,R178         TEMP1L = IMAF;
07f15: 8b,fe,0a,26        cmpw  R26,[Rfe+a]      
07f19: d1,13              jleu  07f2e            if (TEMP1L <= MAF_HI_KOEO) goto 07f2e; }

     # JGTU  from L07F07                                                           uuwFnACTUAL_TQ
     # SJump from L07F0F                                                           uuwFnACTUAL_TQ
07f1b: b3,d8,2d,c6        ldb   Rc6,[Rd8+2d]     FLAGTEMP_BG = AIR_BACK_FLAGS;
07f1f: 3b,c6,0c           jb    B3,Rc6,07f2e     if (B3_FLAGTEMP_BG = 0)  {
07f22: b3,d8,2d,c6        ldb   Rc6,[Rd8+2d]     FLAGTEMP_BG = AIR_BACK_FLAGS;
07f26: 3a,c6,05           jb    B2,Rc6,07f2e     if (B2_FLAGTEMP_BG = 0)  {
07f29: ef,2e,59           call  0d85a            Sxx0D85A_ALSO_RZA0F887_39.1.1.2.8_STORE_CODE(&Pxxx) (
07f2c: 9e,0a                    #arg 1              p1101_RECORD ); } } } } } }

     # JLEU  from L07EF5                                                           uuwFnACTUAL_TQ
     # JLEU  from L07EFE                                                           uuwFnACTUAL_TQ
     # JC    from L07F0D                                                           uuwFnACTUAL_TQ
     # JLEU  from L07F19                                                           
     # JB    from L07F1F B3_FLAGTEMP_BG = 1                                        
     # JB    from L07F26 B2_FLAGTEMP_BG = 1                                        
07f2e: 20,63              sjmp  07f93            goto 07f93;