Re: SFR+100 and R+100 8065 memory access
Posted: 2021 Apr 16, 12:07
This has been a fun distraction from every day life.
For me, I have learned a lot more about differences with 8061 and 8065, specifically with how the uP decodes how to select different banks.
Once this covid stuff is settled, I would like to buy you jsa, a beer, or a pop whatever you prefer(seriously)!.
SFRs do not use +100, only general registers if there are more than one 64k byte memory chips on board and some other circuit details.
The hardware does what we expect. Its the disassembly process that is incorrect.
The disassembly does not know how many fixed hardware 64k memory banks exists in box.
The software nor the hardware cares if you try and access a word with ODD addressing, it works.
With one 64K bank memory(bank 0, or #8 as default, still one bank), lets use R3b again, uP will access register 0x3a.
With two or more 64K bank memory, Direct word addressing will access the odd bank pair bit A0, with the pair being select from PSW 9.
If PSW bit 9 is 0, that would select the bank pair 0 or 1. address bit A0 is odd, so it would select bank 1 register 0x3a.
Bank 1 0x3a, otherwise known as your +100, will show in disassembly as register 0x13a
Again, if your hardware only has bank0, the register will be accessed as +000, register 0x03a.
Your test code shows that single bank hardware, access to word registers 0x3b and 0x13a are different(single bank)
Your test code shows that in multi bank hardware, access to word registers 0x3b and 0x13a are the same(3b odd, bank1, 0x13a bank 1 0x3a).
Does that clear it up?
For me, I have learned a lot more about differences with 8061 and 8065, specifically with how the uP decodes how to select different banks.
Once this covid stuff is settled, I would like to buy you jsa, a beer, or a pop whatever you prefer(seriously)!.
SFRs do not use +100, only general registers if there are more than one 64k byte memory chips on board and some other circuit details.
The hardware does what we expect. Its the disassembly process that is incorrect.
The disassembly does not know how many fixed hardware 64k memory banks exists in box.
The software nor the hardware cares if you try and access a word with ODD addressing, it works.
With one 64K bank memory(bank 0, or #8 as default, still one bank), lets use R3b again, uP will access register 0x3a.
With two or more 64K bank memory, Direct word addressing will access the odd bank pair bit A0, with the pair being select from PSW 9.
If PSW bit 9 is 0, that would select the bank pair 0 or 1. address bit A0 is odd, so it would select bank 1 register 0x3a.
Bank 1 0x3a, otherwise known as your +100, will show in disassembly as register 0x13a
Again, if your hardware only has bank0, the register will be accessed as +000, register 0x03a.
Your test code shows that single bank hardware, access to word registers 0x3b and 0x13a are different(single bank)
Your test code shows that in multi bank hardware, access to word registers 0x3b and 0x13a are the same(3b odd, bank1, 0x13a bank 1 0x3a).
Does that clear it up?