EFIDynoTuning Forum

034v wrote: ↑2025 Dec 03, 12:46 I have these as a possibility.

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A0C2	5.8	Bronco, F-x50 E-x50	SD-Bank / E4OD
Ban1	5.8	Bronco, F-x50 E-x50	SD-Bank / E4OD
C2S2	5.8	Bronco, F-x50 E-x50	SD-Bank / E4OD
C9S1	5.8	Bronco, F-x50 E-x50	SD-Bank / E4OD
E0D	5.8	Bronco, F-x50 E-x50	SD-Bank / E4OD
JAG2	5.8	Bronco, F-x50 E-x50	SD-Bank / E4OD
S0M	5.8	Bronco, F-x50 E-x50	SD-Bank / E4OD
X2Z2	5.8	Bronco, F-x50 E-x50	SD-Bank / E4OD
C3P1	5.8	1993-95 Lightning	SD-Bank / E4OD / F3TF-12A650-AB
C3P2	5.8	1993-95 Lightning	SD-Bank / E4OD / F3TF-12A650-AC
C3P3	5.8	1993-95 Lightning	SD-Bank / E4OD / F3TF-12A650-AD
ICY1	5.8	1993-95 Lightning	SD-Bank / E4OD / F5TF-12A650-XB

jsa wrote: ↑2025 Dec 03, 01:32 DCLHP looks to be enabled in the bin and the external interrupt also, but for whatever reason I can't get your bin too talk on the DCL capable hardware I have here. So none the wiser on catch code.

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SYM   52 "DCLHP"                      :B1 # DCL Hardware Present
SYM B003 "S.LINK_SW_UART&DOL&DCL"

If your hardware code is the same as A1C then you can run A1C on your hardware. A1C will need to support the same functionality as your bin does, so it may/not work out depending on similarity/difference.

wwhite wrote: ↑2025 Dec 04, 14:19
I disagree.
LINK_SW is located at 0xB003, and is set to 6. In binary we get 0110, which leaves bit 1 = 0.
So, DCLHP:B1 = 0, no DCL hardware present.

jsa wrote: ↑2025 Dec 04, 16:08 We agree LINK_SW is 0xB003 and equals 0x6 or bin 0000 0110.

I disagree.
Bit 0 = 0
Bit 1 = 1 DCL hardware is present.
Bit 2 = 1
Bits 3 to 7 = 0

Bit numbering starts at zero.