SAD Version 5 (alpha)

[BOOSTEDEVERYTHING]

Sorry, maybe I misunderstood. Is that not RZASA? If it is not I am sorry for speaking out of turn. If it is, could you please explain if the older version of SAD is disassembling this wrong or if the new version is mistaken?

[jsa]

0472c: bd,ff,e3 ldsbw Re3,ff swR1e2 = ff

that looks correct

+100 offset on a byte operation, though the 2nd operand is an odd word. Thanks for the heads up, will look at that more closely.

[jsa]

No it is not RZASA. I'm testing against all sorts of bins, this one is KIEE, a multi bank 8065.

Old versions look to be wrong.

8065's have an address mode that is very poorly and only partly covered in the manuals.
A word operation with an odd register operand will offset to even register+100 bytes.
It transpired that it was not confined to operand 1 like other odd operand address modes.
I wrote a test bin to confirm what worked on what hardware, but a byte to word operation with odd operand two was not tested.
Thankfully, TVRfan has caught it in V5.08 and Decipha has corrected me.

Looking at use of R1E2 around L0472C confirms that the address mode applies to byte operations where, operand 2, the destination word is an odd register operand.

4.07.16B

Code: Select all

0472c: bd,ff,e3           ldsbw Re3,ff           swRe3 = ff; }

4.12

Code: Select all

0472c: bd,ff,e3           ldsbw Re3,ff           swRe3 = ff; }

5.08

Code: Select all

0471f: c3,01,e4,06,e3     stw   R1e2,[R0+6e4]    [106e4] = R1e2;
04724: c0,e3,ce           stw   Rce,R1e2         R1e2 = Rce;
04727: 98,cc,00           cmpb  R0,Rcc           
0472a: df,03              je    0472f            if (Rcc != 0) {
0472c: bd,ff,e3           ldsbw Re3,ff           swR1e2 = ff; }

[BOOSTEDEVERYTHING]

Ok, Sorry about the misunderstanding and thank you for explaining that for me. I’m going to read it a few more times to see if it sinks in. Would that apply to all odd operand 2 locations in a 8065 bin file?

[jsa]

No worries. Re-read it in conjunction with the address modes info in the manuals.

I wouldn't answer that with an absolute yes or no.

[jsa]

An example of ARGS not being printed. EKO2 bin with 4.07.16B VS 5.08.

[BOOSTEDEVERYTHING]

I noticed that as well. I did try running and comparing a few things in the msg and lst files between the 2 versions. I noticed a lot of differences in the msg file, some extra word entries in SAD 5 and some extra functions, tables and code entries as well. But a few are missing that sad v4.07.16b and 4.012 found as well

[tvrfan]

Everyone,
I haven't disappeared, still working away to try to solve the various problems on version 5. As the missing arguments picked up by you guys seems to be a design issue (not a bug as such), it's going to take a while to fix, as I need some new ideas. But I'm not giving up.

To confirm, the version I added as 4.0.7 in stable branch is 4.0.7.16 (dated June '21), and I don't think it has any serious bugs left.

So for the best overall disassemble right now, stick with 4.0.7, or 4.0.12 for slightly newer version, but I think it has a few address glitches ?

Andy.

[jsa]

Thank you for your continued effort.
4.07.16b 11 Apr 2022 includes support word size tables.

Yes, 4.012 sym addresses can have issues with inline scalars.

[BOOSTEDEVERYTHING]

TVRFan…is there a way to request a couple things to be added to the new versions of SAD? I would like to request to see if you could incorporate a looped scan command and possibly SAD produced branch comments, and loop comments. Also, SAD 5 still doesn't like an address to have both a word value and byte value assigned to it, could that also be incorporated? Or could you possibly add the previous 2 things to a previous version of SAD 4? I hate to ask for things, being as I am so new to the community. These would be a huge help for me as a newbie, and I think they may help other new people as well. Thanks for the consideration. And also thanks so much for the continuing development on this software.