Search found 274 matches

by jsa
2024 Mar 22, 15:06
Forum: Hardware, Programming & Disassembly
Topic: EEC V file conversion
Replies: 359
Views: 58349

Re: EEC V file conversion

Freeze panes in spreadsheet. Google it.

1973D was my best judgement, as posted above.
SAD has auto discovered the next two words.

Code is the blunt force trauma of SAD commands. The user better be certain that it IS all code.

Any non code in between the small range code commands will be forced to code by the large range code command.

Better to use scan commands starting with 8fce8.
Sca 8fce8
If needed,
Sca 8fcfa
Etc.
by jsa
2024 Mar 21, 20:31
Forum: Hardware, Programming & Disassembly
Topic: SAD Version 5 (alpha)
Replies: 143
Views: 14744

Re: SAD Version 5 (alpha)

An example of ARGS not being printed. EKO2 bin with 4.07.16B VS 5.08.
Image
by jsa
2024 Mar 21, 20:18
Forum: Hardware, Programming & Disassembly
Topic: EEC V file conversion
Replies: 359
Views: 58349

Re: EEC V file conversion

BOOSTEDEVERYTHING wrote: 2024 Mar 21, 12:57 Also.. I think somewhere in the mess below is the fault code list, But I am not sure exactly where and how to make sad see a big area of what it thinks are tables, as words. And where to start and end exactly. Can you please help with guiding me towards this as well? I will go ahead and also post a zip of the bin and dir files i am using for reference. Thanks again

I think the fault code list starts around 19596

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19596: 20,04,30,04,60,14,64,14  table   32,   4,  48,   4,  96,  20, 100,  20
...
Use the word command, as I have in the RZASA DIR previously posted in this thread.

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WOR 19596 1973D
Search the LST for immediate values.

Comparing OMAE2 to RZASA, I've sifted previously, you'll find a matching sub.
Failing that I'd search for 13,01 and see if other codes are nearby, from there make my best judgement.
Eventually, enough code can be identified to confirm best judgement. One could confirm actual table end to infer fault code list start.

Another immediate value indicates the start of the next block of data. Make a judgement about the end of the previous. Time will tell if that is correct.

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0b62c: 65,3e,97,2a        ad2w  R2a,973e         TEMP3L += 973e;
Beware 5.08 leaves out lots of args.
Args.PNG
by jsa
2024 Mar 21, 19:02
Forum: Hardware, Programming & Disassembly
Topic: EEC V file conversion
Replies: 359
Views: 58349

Re: EEC V file conversion

BOOSTEDEVERYTHING wrote: 2024 Mar 21, 10:55 I need help with these.....

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code 1b7c2 1b7d3 << Error - Commands Overlap
Can you please explain at least one of them for me so I can correct the rest or at least know exactly how they overlap? Thanks
Seems you fixed them in the DIR you posted in your next post.

I've explained one in my previous post.
by jsa
2024 Mar 21, 18:32
Forum: Hardware, Programming & Disassembly
Topic: EEC V file conversion
Replies: 359
Views: 58349

Re: EEC V file conversion

BOOSTEDEVERYTHING wrote: 2024 Mar 19, 10:36 I also have a question about the below, I am having issues trying to fix the errors in the DIR file noted in the MSG file. I just am not sure about what version he used for the below commands, and I can't seem to find them in the current SAD docs I have, although, I did not download the older version of the docs. Maybe I need to do that to be able to change the commands to the current versions. But that being said, I do not get the "error-commands overlap" errors. I did fix quite a few of them already, these are just the ones I have not gotten to yet, or do not quite understand. I am sure it is just a version to version issue and I just maybe need to find the old docs and spend time comparing, but any help would be appreciated. thanks again!!!
That is very early SAD DIR syntax.
This help file should cover it.
SAD.pdf
(146.46 KiB) Downloaded 16 times

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sym b4 "PCM_PIN_2_mil" : T + << Error - Invalid Option
Relace the :T+ with :B

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sub  0f99e "Sub256"   :Y  : F 9 << Error - Invalid Option
sub  0f9da "Sub251"   :Y O +2  : F 8 << Error - Invalid Option
F was for function lookups. Remove the :F9 and :F8.

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vect 19ddc 19e14 : D 0 << Warning - End inconsistent with size, set to to 29e13
 << Error - Bank invalid
Change the Vect end to 19E13 etc. Looks like a bank bug as well

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sub  82895 "UUByteLU"   : F 1 << Error - Invalid Option
F was function lookup. Just remove the :F1 etc. Newer SAD has picked them as lookups automatically.

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word 8f8d6 8f8e4   << Warning - End inconsistent with size, set to to 9f8e3
Change the end to 8f8e3. Looks like a bank bug as well.

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code 8fcfa 8fd2f << Error - Commands Overlap
These suggest that there is a second command in DIR within that address range, or its a bug if no other command overlaps.

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subr 8ffa7 << Error - Invalid address
Sub error checking disagrees with the sub command.
by jsa
2024 Mar 21, 01:32
Forum: Hardware, Programming & Disassembly
Topic: SAD Version 5 (alpha)
Replies: 143
Views: 14744

Re: SAD Version 5 (alpha)

No worries. Re-read it in conjunction with the address modes info in the manuals.

I wouldn't answer that with an absolute yes or no.
by jsa
2024 Mar 20, 21:07
Forum: Hardware, Programming & Disassembly
Topic: SAD Version 5 (alpha)
Replies: 143
Views: 14744

Re: SAD Version 5 (alpha)

No it is not RZASA. I'm testing against all sorts of bins, this one is KIEE, a multi bank 8065.

Old versions look to be wrong.

8065's have an address mode that is very poorly and only partly covered in the manuals.
A word operation with an odd register operand will offset to even register+100 bytes.
It transpired that it was not confined to operand 1 like other odd operand address modes.
I wrote a test bin to confirm what worked on what hardware, but a byte to word operation with odd operand two was not tested.
Thankfully, TVRfan has caught it in V5.08 and Decipha has corrected me.

Looking at use of R1E2 around L0472C confirms that the address mode applies to byte operations where, operand 2, the destination word is an odd register operand.

4.07.16B

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0472c: bd,ff,e3           ldsbw Re3,ff           swRe3 = ff; }
4.12

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0472c: bd,ff,e3           ldsbw Re3,ff           swRe3 = ff; }
5.08

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0471f: c3,01,e4,06,e3     stw   R1e2,[R0+6e4]    [106e4] = R1e2;
04724: c0,e3,ce           stw   Rce,R1e2         R1e2 = Rce;
04727: 98,cc,00           cmpb  R0,Rcc           
0472a: df,03              je    0472f            if (Rcc != 0) {
0472c: bd,ff,e3           ldsbw Re3,ff           swR1e2 = ff; }
by jsa
2024 Mar 20, 16:04
Forum: Hardware, Programming & Disassembly
Topic: SAD Version 5 (alpha)
Replies: 143
Views: 14744

Re: SAD Version 5 (alpha)

decipha wrote: 2024 Mar 20, 10:30 0472c: bd,ff,e3 ldsbw Re3,ff swR1e2 = ff

that looks correct
+100 offset on a byte operation, though the 2nd operand is an odd word. Thanks for the heads up, will look at that more closely.
by jsa
2024 Mar 20, 06:24
Forum: Hardware, Programming & Disassembly
Topic: SAD Version 5 (alpha)
Replies: 143
Views: 14744

Re: SAD Version 5 (alpha)

tvrfan wrote: 2024 Feb 20, 22:22 Released version 5.0.8 with some more fixes.
-snip-
In the meantime v4 works OK, and you can use its output to feed into v5 to add calcs and new features, modify and/or make your own commands to fix the v5 issues.
Been giving 5.08 a workout. Progress but seeing enough issues to say it's not ready for prime time yet.
* Lookup signatures are not working well, lots missed.
* Some errors related to bits.
* Seeing these (0 > 0) where two PSW bits are required to determine branch action.
* Args not being printed, call then return line of code printed, no args in between.
* Code discovery in some bins has improved but its pretty much unusable on RZASA.
* Bank numbering issues in print.
* Issues with calc.

Edit; +100 offset on operand 2 of a byte operation, I'm likely wrong calling this out. See later post for explanation.
*You mentioned AI, should not have wished for that, SAD is hallucinating. 0472c: bd,ff,e3 ldsbw Re3,ff swR1e2 = ff; }
by jsa
2024 Mar 19, 16:32
Forum: Hardware, Programming & Disassembly
Topic: EEC V file conversion
Replies: 359
Views: 58349

Re: EEC V file conversion

Yes.

A newbies perspective can help.